Computer assemblers are programs that enable programmers to write machine level programs, and do so by converting source programs written with instruction mnemonics into machine code. Typically, an assembler operates on source codes in which each line contains an instruction, an assembler directive, a comment, or a macro directive.
The execution of an instruction is called the fetch-execute cycle, and is composed of a sequence of micro-instructions. As opposed to instructions, which are stored in primary memory, micro-instructions are usually stored in a control memory. A micro-instruction is a collection of data transfer orders that are simultaneously executed. The data transfers that result from these orders are movements of, and operations on, words of data as these words are moved around in the machine. Micro-instructions are grouped as a function of data path cycles, which are fixed times when the memory fetches an instruction, memorizes or recalls a data word, or is idle. A clock beats out time signals, one clock pulse per data path cycle. The processor's fetch-execute cycle is thus a period of data path cycles.
Recent innovations in processor architecture have attempted to improve the efficiency of traditional architecture described above. One recent innovation is the reduced instruction set computer (RISC). These computers are programmed with instructions that are executed in a single data path cycle.
However, existing architectures are constrained to the assumption that no more than one instruction is executed per data path cycle. A need exists for a new approach to processor design that is not confined to this assumption.